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New Intel backside chip tech and power delivery system revealed

By delivering power via the backside of chips, Intel PowerVia looks set to bring a step change in CPU and other silicon chip production.

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Intel has revealed how it has managed to produce the industry’s first ‘product-like’ chips using a new backside power delivery technique called Intel PowerVia. The new development allows for silicon chips such as CPUs to ‘increase performance and energy-efficiency, and deliver better results for customers’ according to Intel.

The key aspect of backside power delivery is that with traditional chip design, as used on CPUs from both AMD and Intel, both the copper traces used to deliver power and those used to deliver signals to the transistors of a chip are produced on the same side of the silicon – everything is stacked on top of the transistors that sit at the lowest level of the chip. However, with backside power delivery, the traces required for power delivery are produced below the transistors, on the backside of the chip.

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The upshot of this approach is that the two types of traces are no longer competing for the space above the transistors, removing one of the bottlenecks of creating ever more transistor-dense chips. As proof of this, Intel claims a standard cell utilization (the percentage of a die area that is filled with the standard logic cells of a chip) of more than 90 percent over large areas of its test dies, though it doesn’t reveal how this percentage compares to conventional production methods.

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As well as allowing for denser circuits, the technique can also boost voltage stability with Intel saying its tests showed a 30 percent improvement in voltage droop. This stability could allow for higher overall clock speeds, more consistent clock speeds, or improved power efficiency.

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Talking of clock speeds, Intel’s figures show a 6 percent frequency benefit using backside power, which is a fairly modest gain but we may well see larger changes as the technology develops further.

Meanwhile, in terms of thermals, Intel claims ‘the thermal characteristics in the PowerVia test chip [are] in line with higher power densities expected from logic scaling’. In other words, PowerVia hasn’t revolutionized CPU heat dissipation but neither has it harmed it.

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This initial test run was performed using the company’s current Intel 4 process but Intel will first implement PowerVia into production chips using its Intel 20A (the ‘A’ refers to angstrom which is 10-10 meters) production node in the first half of 2024.

Intel 20A is several steps away from the processes used to produce today’s chips. The current Intel 13th-gen Core Raptor Lake products, such as the Intel Core i5-13600K, are built on the company’s Intel 7 process, which would’ve been in production a year or more ago. Meanwhile, its next-generation 14th-gen Meteor Lake processors are expected to move to Intel 4 and be in production now. After that is Intel 3, which starts production later this year, so Intel 20A products are some way off being available.

PowerVia isn’t the only implementation of backside power delivery but Intel claims its recent ‘product-like’ tests show it’s well ahead of competing chip production competitors, such as TSMC.

Intel plans to reveal details of its more advanced PowerVia research, ‘such as enabling both signaling and power delivery on either the front or the back side of the wafer’, at the VLSI conference Kyoto on June 11th 2023.

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